Devendra K Sadana

Devendra K. Sadana received his Ph.D. in Physics from Indian Institute of Technology, New Delhi (India), in 1975. He subsequently joined the University of Oxford, England, as a Research Fellow and worked on ion implanted silicon and gallium arsenie from 1975 to 1979. He worked on similar material systems at University of California, Berkeley from 1979 to 1983. Dr Sadana became engaged in characterisation of processed silicon, silicon devices and ICs from 1983 to 1987 at Microelectronics Center of North Carolina, Research Triangle Park, NC, and Philips Research Lab in Sunnyvale CA. He joined IBM Research in 1987 and has since been working very closely with IBM's product divisions on a variety of issues pertaining to silicon and SOI technologies. He is presently a Senior Technical Staff Member and heads a group of material scientists, physicists and electrical engineers to develop materials and processes for IBM's future generation CMOS technologies. He holds 33 patents, has published over 120 technical articles in refereed journals and proceedings, has written six book chapters, and has given numerous invited talks and industrial courses in the last three decades of his scientific career. He received IBM's corporate award on SOI CMOS technology in 2001.