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Iddq Testing for CMOS VLSI

Iddq Testing for CMOS VLSI

          
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About the Book

Provides coverage of IDDQ testing, including discussion of the correlation between physical defects and logical faults, and how IDDQ testing detects these defects. This title presents information on test generation for IDDQ testing; use of stuck-at and random vectors for IDDQ testing; use of IDDQ testing in factory production lines; cost benefit analysis; instrumentation issues; off-chip and on-chip current senors; ATE interface; case studies with memories and microprocessors; and proposed IEE QTAG standards. It also supplies planning guidelines and optimization methods, together with numerous examples ranging from simple circuits to extensive case studies. It should be useful as a reference for designers and test engineers.


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Product Details
  • ISBN-13: 9780890067260
  • Publisher: Artech House Publishers
  • Publisher Imprint: Artech House Publishers
  • Height: 237 mm
  • No of Pages: 193
  • Series Title: Artech House Optoelectronics Library
  • Weight: 400 gr
  • ISBN-10: 0890067260
  • Publisher Date: 01 Jan 1995
  • Binding: Hardback
  • Language: English
  • Returnable: N
  • Spine Width: 17 mm
  • Width: 158 mm


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