With the growing complexity of personal mobile communication systems demanding higher data-rates and high levels of integration using low-cost CMOS technology, overall system performance has become more sensitive to RF analog front-end impairments. Designing integrated transceivers requires a thorough understanding of the whole transceiver chain including RF analog front-end and digital baseband. Communication system engineers have to include RF analog imperfections in their simulation benches in order to study and quantify their impact on the system performance. Here the author explores key RF analog impairments in a transceiver and demonstrates how to model their impact from a communication system design view-point. He discusses the design aspects of the front end of transceivers (both receivers and transmitters) and provides the reader with a way to optimize a complex mixed-signal platform by taking into account the characteristics of the RF/analog front-end. Key features of this book include: Practical examples illustrated by system simulation results based on WiFi and mobile WiMAX OFDM transceivers An overview of the digital estimation and compensation of the RF analog impairments such as power amplifier distortion, quadrature imbalance, and carrier and sampling frequency offsets An exposition of the challenges involved in the design of both RF analog circuits and DSP communication circuits in deep submicron CMOS technology MATLAB® codes for RF analog impairments models  hosted on the companion website Uniquely the book bridges the gap between RFIC design specification needs and communication systems simulation, offering readers RF analog impairments modeling knowledge and a comprehensive approach to unifying theory and practice in system modelling. It is of great value to communication systems and DSP engineers and graduate students who design communication processing engines, RF/analog systems and IC design engineers involved in the design of communication platforms.

Table of Contents:
Preface xi Acknowledgments xiii About the Author xv 1 Introduction to Communication System-on-Chip, RF Analog Front-End, OFDM Modulation, and Performance Metrics 1 1.1 Communication System-on-Chip 1 1.1.1 Introduction 1 1.1.2 CMOS Technology 3 1.1.3 Coexistence Issues 4 1.2 RF AFE Overview 6 1.2.1 Introduction 6 1.2.2 Superheterodyne Transceiver 8 1.2.3 Homodyne Transceiver 10 1.2.4 Low-IF Transceiver 11 1.2.5 Analog Baseband Filter Order versus ADC Dynamic Range 12 1.2.6 Digital Compensation of RF Analog Front-End Imperfections 13 1.3 OFDM Modulation 14 1.3.1 OFDM as a Multicarrier Modulation 14 1.3.2 Fourier Transform and Orthogonal Subcarriers 15 1.3.3 Channel Estimation and Equalization in Frequency Domain 18 1.3.4 Pilot-Tones 20 1.3.5 Guard Interval 21 1.3.6 Windowed OFDM 21 1.3.7 Adaptive Transmission 22 1.3.8 OFDMA for Multiple Access 23 1.3.9 Scalable OFDMA 23 1.3.10 OFDM DBB Architecture 24 1.3.11 OFDM-Based Standards 27 1.4 SNR, EVM, and 1.4.1 Bit Error Rate 27 1.4.2 SNR versus EVM 28 1.4.3 SNR versus E 1.4.4 Complex Baseband Representation 32 References 34 Eb/N0 Definitions and Relationship 27b/N0 31 2 RF Analog Impairments Description and Modeling 37 2.1 Introduction 37 2.2 Thermal Noise 38 2.2.1 Additive White Gaussian Noise 38 2.2.2 Noise Figure and Sensitivity 40 2.2.3 Cascaded Noise Voltage in IC Design 41 2.2.4 AWGN in Simulations 42 2.2.5 Flicker Noise and AWGN Modeling 43 2.3 Oscillator Phase Noise 44 2.3.1 Description and Impact on the System 44 2.3.2 Phase Noise Modeling in the Frequency Domain 45 2.3.3 Simulation in Temporal Domain 49 2.3.4 SNR Limitation due to the Phase Noise 50 2.3.5 Impact of Phase Noise in OFDM 52 2.4 Sampling Jitter 57 2.4.1 Jitter Definitions 57 2.4.2 Sampling Jitter and Phase Noise Relationship 58 2.4.3 SNR Limitation due to Sampling Jitter 61 2.4.4 Impact of Sampling Jitter in OFDM 63 2.4.5 Sampling Jitter Modeling 63 2.5 Carrier Frequency Offset 64 2.5.1 Description 64 2.5.2 Impact of CFO in OFDM 65 2.6 Sampling Frequency Offset 67 2.6.1 Description 67 2.6.2 Impact of SFO in OFDM 68 2.7 I and Q Mismatch 71 2.7.1 Description 71 2.7.2 IQ Mismatch Modeling 76 2.7.3 SNR Limitation due to IQ Mismatch 76 2.7.4 Impact of IQ Mismatch in OFDM 78 2.8 DAC/ADC Quantization Noise and Clipping 79 2.8.1 SNR Limitation due to the Quantization Noise and Clipping Level 79 2.8.2 Impact of Converter Clipping Level in OFDM 82 2.8.3 DAC and ADC Dynamic Range in OFDM 84 2.8.4 DAC and ADC Modeling 86 2.9 IP2 and IP3: Second- and Third-Order Nonlinearities 87 2.9.1 Harmonics (Single-Tone Test) 87 2.9.2 Intermodulation Distortion (Two-Tone Test) 89 2.9.3 Receiver Performance Degradation due to the Non-linearities 92 2.9.4 Impact of Third-Order Nonlinearity in OFDM 95 2.9.5 Simulation in Complex Baseband 98 2.10 Power Amplifier Distortion 99 2.10.1 PA Modeling 99 2.10.2 Impact of PA Distortions in OFDM 102 References 104 3 Simulation of the RF Analog Impairments Impact on Real OFDM-Based Transceiver Performance 107 3.1 Introduction 107 3.2 WLAN and Mobile WiMAX PHY Overview 108 3.2.1 WLAN: Standard IEEE 802.11a/g 108 3.2.2 Mobile WiMAX: Standard IEEE 802.16e 109 3.3 Simulation Bench Overview 110 3.3.1 WiFi and WiMAX OFDM Transceiver Modeling 110 3.3.2 EVM Estimation as Performance Metric 112 3.3.3 EVM versus SNR Simulations in AWGN Channel 113 3.4 WiFi OFDM and Mobile WiMAX Signals PAPR 116 3.5 Transmitter Impairments Simulation 117 3.5.1 Introduction 117 3.5.2 DAC Clipping and Resolution 118 3.5.3 I and Q Mismatch 121 3.5.4 RF Oscillator Phase Noise 125 3.5.5 Power Amplifier Distortion 130 3.5.6 Transmitter Complete Simulation 133 3.6 Receiver Impairments Simulation 134 3.6.1 Introduction 134 3.6.2 Carrier Frequency Offset 135 3.6.3 Sampling Frequency Offset 140 3.6.4 Linearity: IIP2 and IIP3 146 3.6.5 I and Q Mismatch 154 3.6.6 RF Oscillator Phase Noise and Reciprocal Mixing 154 3.6.7 Sampling Jitter 156 3.6.8 ADC Clipping and Resolution 158 3.6.9 Receiver Complete Simulation 160 3.7 Adaptive Modulation Illustration 162 3.8 Summary 164 References 164 4 Digital Compensation of RF Analog Impairments 167 4.1 Introduction 167 4.2 CFO Estimation and Correction 168 4.2.1 CFO Estimation Principle 168 4.2.2 CFO Estimation in the Time Domain 170 4.2.3 CFO Estimation in the Frequency Domain 172 4.2.4 CFO Correction 175 4.3 SFO Estimation and Correction 176 4.3.1 SFO Estimation Principle 176 4.3.2 SFO Estimation 178 4.3.3 SFO Correction 181 4.3.4 Joint SFO and CFO Estimation 181 4.4 IQ Mismatch Estimation and Correction 183 4.4.1 Principle 183 4.4.2 Effect of the Channel 186 4.4.3 Simulation Results 187 4.5 Power Amplifier Linearization 190 4.5.1 Digital Predistortion Principle 190 4.5.2 Memory Polynomial Predistortion 191 4.5.3 Polynomial Coefficients Computation 192 4.5.4 Simulation Results 193 4.6 Summary 196 References 197 Index 199