An improvement upon Verilog and VHDL, e gives engineers the speed and efficiency to improve the quality of design verification. The text offers examples and exercises as well as a fully functional demo.
About the Author:
About the Author
Samir Palnitkar is the President of Jambo Systems, Inc., a leading ASIC design and verificationservices company and a Verisity Verification Alliance partner. He previously founded IntegratedIntellectual Property, Inc., an ASIC company that was acquired by Lattice Semiconductor, Inc., and Obongo, Inc., an e-commerce software firm that was acquired by AOL Time Warner, Inc. Heholds a Bachelor of Technology in Electrical Engineering from the Indian Institute ofTechnology, Kanpur; a Master's in Electrical Engineering from the University of Washington, Seattle; and an MBA degree from San Jose State University, San Jose, California. Heis a recognized authority on e , Verilog HDL, modeling, verification, logic synthesis, andEDA-based methodologies in digital design. He has worked extensively with design andverification on various successful microprocessor, ASIC, and system projects; worked on many e -based projects; and trained hundreds of students on e since 1997.